Tired of spending countless hours debugging PWL sources for your analog design? Want to evaluate your models and design without "eyeballing" waveforms? The ModLyng™ integrated modeling environment enables you to use rapidly compose stimulus, load, and validity checks from system-level model blocks in your current circuit design environment.
ModLyng libraries allow rapid composition of analog stimulus using libraries included with our toolkits, such as the System Level Toolkit™, SPICE compatibility and math/electrical basics and analog assertions libraries.
Use ModLyng effects to easily compose complex stimulus models. Why limit yourself to classic spice primitives (I, V, G, etc)? ModLyng stimulus models are not only more flexible and dynamic, but can be shared between HDL simulators and all levels of system/circuit design!
Use existing ModLyng toolkits to compose stimulus, such as the System Level Toolkit. Easily compose noise sources for your transient analyses using simple system-level blocks:
Adding noise to your ModLyng stimulus model using the System Level Toolkit
No need to limit yourself; with ModLyng you can easily mixed system-level and circuit-level effects to generate general purpose stimulus models. Even control the simulator directly from the model!
Mixing system-level and SPICE-type models to create general purpose stimulus.
How does your stimulus effect the model or circuit under test? Go the next step and learn to evaluate your models and circuits with graphically composed analog assertions.
Assertions allow you to measure model and circuit signals and reduce the validity of a model or test bench to a single number, message or command. No more "eyeballing" waveforms or perplexing waveform measures; assertions allow you to say "right" or "wrong" in a simple, direct manner.
Use ModLyng to generate assertions to be placed wherever needed; at the system, behavioral or circuit level. Assertions allow you to measure any signal or variable in the IME or circuit and specify a pass/fail criteria for the measurement.
The ModLyng Assertions Toolkit provides many such measurements, such as peak detection and rise and fall times.
Measuring the bandwidth of a filter; ModLyng assertions models graphically tell the story!
String the basic assertions together with other models, assertions and effects to compose more exotic checks, or build your own using the Lynguent® provided libraries as a template.
Mix assertions and the System Level libraries to measure waveforms and build dynamic simulator commands!
Build your own Stimulus and Assertions Libraries
With ModLyng, you’re never limited to using just the available models and effects. Copy-modify existing effects and models to create new behaviors, or start from scratch to build your own in-house libraries. Lynguent Expert Services can also customize and build stimulus and assertions libraries to suite your needs.
Using ModLyng to build a custom Chirp source with output frequency port.
Once a stimulus or assertions model is complete, ModLyng generates the HDL you need, be it Verilog-A, Verilog-AMS or VHDL-AMS for your simulator. Stimulus may also be directly exported to your Cadence® design environment with CDSLynk™, or evaluated directly from within ModLyng using the Simulate plugin.
Models may be exported to any of the supported HDLs