System Level Toolkit

ModLyng™ System Level Toolkit

The System Level Toolkit™ consists of a collection of models that implement behavior equivalent to that of the corresponding Simulink® block. The models are organized in libraries as they are in Simulink. The System Level Toolkit, together with the ModLyng Integrated Modeling Environment, enables a user to:

Quickly compose models from building blocks using graphical means
Create system level models for a design
Create behavioral models for a device
Simulate the model in your existing HDL-ready circuit simulator using Verilog-A, Verilog-AMS, VHDL-AMS, or MAST
Migrate a Simulink system level design into a circuit simulation environment
Mix system level portions of a design with portions described at the circuit level and simulate them in the same simulator
Compose complex analog stimulus for use in design and verification
Export the stimulus model or any other model to Verilog-A, Verilog-AMS, VHDL-AMS or MAST

Key Benefits

Provides a single tool for creating system-level models for a design and behavioral models for its components,
Enables system-level portions of a design to be mixed with portions described at the circuit-level and then provides the ability for them to be simulated in the designer’s existing HDL-ready circuit simulator using Verilog-A, Verilog-AMS or VHDL-AMS, and MAST
Reduces design errors introduced through written natural language specifications and requirements derived from system-level design done in Simulink.
Reduces by orders of magnitude the amount of time it takes to migrate a Simulink system-level design into a circuit simulation environment

Key Features

Graphical composition of System Levels models from libraries of building blocks
Create system level models for a design
Create behavioral models for a device
Create system-level models for a design and then, in the same tool, descend into behavioral models of the circuit-level implementation of that design.

Technical Specifications

ModLyng toolkit with its own license
Platforms: Linux, Windows XP, Vista
Export languages: Verilog-A, Verilog-AMS, VHDL-AMS, or MAST
Currently the Simulink Emulation Toolkit supports models with continuous behavior and scalar ports.

(click to enlarge)

Overview

The Simulink® Emulation Toolkit consists of a collection of system level building blocks that implement behavior equivalent to that of the corresponding Simulink block. The models are organized in libraries as they are in Simulink. The toolkit allows a user to create system level models for a circuit simulation environment and to migrate Simulink designs into such an environment.

The Simulink Emulation Toolkit

The purpose of the Simulink Emulation toolkit is to support the designer in the migration of system level designs created originally in Simulink without the need for extensive written natural language prose. Additionally, using the building blocks provided in the toolkit, the designer can create high-level signal flow models as well as construct complex stimulus to be used in verification. By using the Simulink Emulation toolkit, designers are able to descend directly into circuit level implementation from their system-level design without having to change design environments.


Test Bench Model	Model Under Test (MUT)

Designs are easily divided into "Stimulus" and "Model"